The present invention relates to a gate controlled semiconductor device and, more particularly to an improvement of the constructure of a control electrode member of the gate controlled semiconductor device.
A gate controlled semiconductor device having a control electrode member is, generally, employed to switch on only and/or to switch on and off a current which flows in the gate controlled semiconductor device by supplying an ON signal and/or ON and OFF signals to the gate electrode member. There are various switching devices such as, for example, a gate turn-off thyristor, a power transistor, a field effect transistor, a usual transistor, an auxiliary gate turn-off thyristor, a reversely conducting thyristor, a high frequency thyristor and the like, as the gate controlled semiconductor device having the control gate electrode.
In this gate controlled semiconductor device, an important problem is how to supply a control current effectively between a main electrode portion and a control electrode portion of the device by rendering a resistance value between the main electrode portion and the control electrode portion, small, in the case of making a main current which flows in between a plurality of main electrode portions turn on and/or turn on and off.
FIGS. 1 and 2 show a prior art gate controlled semiconductor device in the form of a gate turn-off thyristor. In this case, it should be noted that the dimensions of the figures are exaggerated for clarity.
In FIGS. 1 and 2, reference character 1 shows a disc-shaped wafer which comprises a P.sub.1 layer 2, an N.sub.1 layer 3, a P.sub.2 layer 4 and an N.sub.2 layer 5. A metallic layer 6 is arranged on an exposed surface of the N.sub.2 layer 5 to form a cathode electrode assembly K. A metallic layer 7a is arranged on the center portion of the P.sub.2 layer 4 to form a first gate electrode assembly G.sub.1, and a metallic layer 7b is arranged on an exposed surface of a low resistance P.sub.2.sup.+ layer 9 which is provided in the P.sub.2 layer 4 in order to form a second gate electrode assembly G.sub.2.
In more detail, an annular slot 11 is provided at the edge portion of a surface of the P.sub.2 layer 4, and an annular P.sub.2.sup.+ layer 9 is provided in the bottom portion of which resistance value is relatively low. A plurarity of P.sub.2.sup.+ layers 9a, 9b, 9c and 9d are coaxially embeded in the P.sub.2 layer 4, and a plurarity of P.sub.2.sup.+ layers 91 are radially embeded in the P.sub.2 layer 4 so as to connect the P.sub.2.sup.+ layers 9a to 9d. A low resistance embeded layer 10 is comprised by the P.sub.2.sup.+ layers 9, 9a to 9d and 9l to 9e which are embeded in the P.sub.2 layer 4 so as to oppose the N.sub.2 layer 5. An anode electrode assembly A is formed by arranging a metallic layer 8 on the surface of the P.sub.1 layer 2.
In the above constructed gate turn-off thyristor of the prior art, it is desirable that the resistance value of the embeded resistor layer 10 is low as can be possible. In the case of manufacturing such a low resistance layer by means of the diffusion method, it is, however, impossible to decrease the specific resistance of the low resistance layer, because the surface density thereof is about 5.times.10.sup.20 when the low resistance layer is manufactured by diffusing boron. Particularly, in a large current capacity gate turn-off thyristor with a junction diameter on the order of about 40 millimeter, the dimension of the length of the low resistance buried layer 10 is large and a current to be supplied to the buried layer 10 is great. The structure of the buried layer has, however, various advantages such as the fact that the surface shape of the N.sub.2 layer 5 does not become complicated, the withstand voltage between a gate electrode assembly and a cathode electrode assembly can be made high and the effective area of the cathode electrode which enables the flow of a load current with respect to the whole area of an element is favorable. An opposing area of the buried layer 10 to the N.sub.2 layers 5 must be large in order to decrease the resistance value of the gating current path. When the opposing area of the buried layer 10 is large, a region in which the load current can flow becomes narrow, since the load current can not flow through the low resistance buried layer 10. Accordingly, a using rate of the area in the gate turn-off thyristor is decreased.